http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-July/002018.html I propose a Zfrsqrt extension that consists of the frsqrt.s, frsqrt.d, frsqrt.q, and frsqrt.h instructions, where the 32-bit, 64-bit, 128-bit, and 16-bit versions require the corresponding F, D, Q, etc. extensions. If only the F and Zfrsqrt extensions are supported, then only the frsqrt.s instruction is supported. If only the F, D, and Zfrsqrt extensions are supported, then only the frsqrt.s and the frsqrt.d instructions are supported. Likewise for frsqrt.q and frsqrt.h requiring the corresponding extensions enabled. The operation implemented by frsqrt.* is a correctly-rounded implementation of the IEEE 754-2008 rSqrt operation, with all the usual FP rounding modes supported. For the encoding, I think using an encoding similar to both the fsqrt.* and fdiv.* encodings is a good idea, since frsqrt is similar to both fdiv and fsqrt; Therefore, as an initial proposal, I think using a funct7 value of 0111100 and the rest of the instruction identical to fsqrt is a good idea, since, as far as I'm aware, that doesn't conflict with anything currently. We (libre-riscv.org) are currently planning on implementing frsqrt in our libre GPU, since frsqrt is a common operation in 3D graphics (used for vector normalization, among other things). Comments, modifications, etc. welcome.
FRSQRT.S would need to be funct7=0b0111100 FRSQRT.D would need to be funct7=0b0111101 FRSQRT.Q would need to be funct7=0b0111111 FRSQRT.H would need to be funct7=0b0111110 lower 2 bits of funct7 select the bitwidth. upper 5 bits set the function. (edited to use correct funct7 values)
+----------+---------+-------+-----+--------+----+---------+ | Mnemonic | funct7 | rs2 | rs1 | funct3 | rd | opcode | +==========+=========+=======+=====+========+====+=========+ | fsqrt.s | 0111100 | 00000 | rs1 | rm | rd | 1010011 | +----------+---------+-------+-----+--------+----+---------+ | fsqrt.d | 0111101 | 00000 | rs1 | rm | rd | 1010011 | +----------+---------+-------+-----+--------+----+---------+ | fsqrt.q | 0111110 | 00000 | rs1 | rm | rd | 1010011 | +----------+---------+-------+-----+--------+----+---------+ | fsqrt.h | 0111111 | 00000 | rs1 | rm | rd | 1010011 | +----------+---------+-------+-----+--------+----+---------+
needed for Power ISA instead