Bug 97 - FP16 mul bug
Summary: FP16 mul bug
Status: RESOLVED FIXED
Alias: None
Product: Libre-SOC's first SoC
Classification: Unclassified
Component: ALU (including IEEE754 16/32/64-bit FPU) (show other bugs)
Version: unspecified
Hardware: PC Linux
: --- enhancement
Assignee: Luke Kenneth Casson Leighton
URL:
Depends on:
Blocks:
 
Reported: 2019-06-16 13:42 BST by Luke Kenneth Casson Leighton
Modified: 2019-07-16 10:49 BST (History)
1 user (show)

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Description Luke Kenneth Casson Leighton 2019-06-16 13:42:27 BST 
bug, 0xe225 0x8181 0x249f returns 0x249e
Comment 1 Luke Kenneth Casson Leighton 2019-06-16 13:51:10 BST 
send 0 3 0xf73b 0x802e 0x2d32
recv 0 0x2d30 expected 0x2d32
Comment 2 Luke Kenneth Casson Leighton 2019-07-16 10:49:14 BST 
fixed: was related to the normalisation phases being entirely missing.
tiny numbers just above zero were entering the MUL phase with the
mantissa not being '1' in the MSB.  consequently the product was
nowhere near accurate.

fixed by shifting both A and B up so that the mantissa always has "1"
in the MSB.